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authorLars Persson <lars.persson@axis.com>2016-08-23 16:00:51 +0200
committerArnd Bergmann <arnd@arndb.de>2016-09-13 16:04:40 +0200
commit1b875160af6ca08bcb63d0201f38cca98e16601c (patch)
tree7460561213ce9e7a8ee0244dd662d849515c6d2e /arch/arm/boot/dts/artpec6.dtsi
parentd09ea47ac8dbd391d8d1103ffe841c75f0c1d8e7 (diff)
ARM: dts: artpec: use optimized pl310 settings
Use the cache settings that were determined to give best performance on artpec-6 typical workloads. Signed-off-by: Lars Persson <larper@axis.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/artpec6.dtsi')
-rw-r--r--arch/arm/boot/dts/artpec6.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/artpec6.dtsi b/arch/arm/boot/dts/artpec6.dtsi
index db41b52ecccf..4e40d5550c6a 100644
--- a/arch/arm/boot/dts/artpec6.dtsi
+++ b/arch/arm/boot/dts/artpec6.dtsi
@@ -137,6 +137,13 @@
arm,data-latency = <1 1 1>;
arm,tag-latency = <1 1 1>;
arm,filter-ranges = <0x0 0x80000000>;
+ arm,double-linefill = <1>;
+ arm,double-linefill-incr = <0>;
+ arm,double-linefill-wrap = <0>;
+ prefetch-data = <1>;
+ prefetch-instr = <1>;
+ arm,prefetch-offset = <0>;
+ arm,prefetch-drop = <1>;
};
pmu {