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authorCédric Le Goater <clg@kaod.org>2017-03-01 15:26:42 +0100
committerJoel Stanley <joel@jms.id.au>2017-03-06 09:38:26 +1030
commit74dc3cd32e062b664e78c2e61331b4e0caac7822 (patch)
treecddf7661d73ae05ddfa98dad00d8c633b3fa7962 /arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
parentc1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201 (diff)
ARM: dts: aspeed: add SPI controller bindings
Let's define the SPI controllers in the Aspeed SoCs AST2500 and AST2400 and also enable these, as well as the chips, on the associated platforms. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts')
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
index 1d2fc1e1dc29..aab1889f702f 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -31,6 +31,22 @@
};
};
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ label = "bmc";
+ };
+};
+
+&spi {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ label = "pnor";
+ };
+};
+
&uart5 {
status = "okay";
};