summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/aspeed-g4.dtsi
diff options
context:
space:
mode:
authorJoel Stanley <joel@jms.id.au>2017-10-04 17:19:10 +1030
committerJoel Stanley <joel@jms.id.au>2017-10-05 15:06:13 +1030
commit29b246400cc0e8c5e0e2f9d0206c53df93b79bea (patch)
treed11e1706a0fcbfc53e5f3ba534131099ddcf953e /arch/arm/boot/dts/aspeed-g4.dtsi
parentcd7df3f7adbc910f7220b1c2220374bda67dd4ec (diff)
ARM: dts: aspeed: Reorder ADC node
We try to keep the nodes in address order. The ADC node was out of place. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g4.dtsi')
-rw-r--r--arch/arm/boot/dts/aspeed-g4.dtsi16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 1edd0cee6221..c2d96b8a5065 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -129,6 +129,14 @@
};
};
+ adc: adc@1e6e9000 {
+ compatible = "aspeed,ast2400-adc";
+ reg = <0x1e6e9000 0xb0>;
+ clocks = <&clk_apb>;
+ #io-channel-cells = <1>;
+ status = "disabled";
+ };
+
sram@1e720000 {
compatible = "mmio-sram";
reg = <0x1e720000 0x8000>; // 32K
@@ -227,14 +235,6 @@
no-loopback-test;
status = "disabled";
};
-
- adc: adc@1e6e9000 {
- compatible = "aspeed,ast2400-adc";
- reg = <0x1e6e9000 0xb0>;
- clocks = <&clk_apb>;
- #io-channel-cells = <1>;
- status = "disabled";
- };
};
};
};