diff options
| author | Joel Stanley <joel@jms.id.au> | 2018-02-12 18:13:23 +1030 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2018-02-19 17:59:53 +1030 |
| commit | 7674bf96b82e22950c00151d4a9f45e0bc988698 (patch) | |
| tree | 65e6838878fbd1af3f14d836eff26481cd43e3ae /arch/arm/boot/dts/aspeed-g5.dtsi | |
| parent | 542d2f4588ae651c4c1c59a5ca9ac731fe06c881 (diff) | |
ARM: dts: aspeed: Add LPC clock phandles
The LPC device uses LCLK.
Tested-by: Lei YU <mine260309@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index e0b6803f6845..8eac57c33880 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -283,6 +283,7 @@ lpc_ctrl: lpc-ctrl@0 { compatible = "aspeed,ast2500-lpc-ctrl"; reg = <0x0 0x80>; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; |