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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2013-06-17 14:38:27 +0200
committerNicolas Ferre <nicolas.ferre@atmel.com>2013-06-26 10:13:14 +0200
commit32a86877d8c69c36b8c5fb65a4e3d72747988950 (patch)
treeee3f492fab7c44390c06d7db185093256385f1dc /arch/arm/boot/dts/at91rm9200.dtsi
parentc07b000ffe160d7c5e9b5fa1710a2cb2777e74ff (diff)
ARM: at91: dt: rm9200: add spi support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91rm9200.dtsi')
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index b91cf78f2cf1..1fc645ef46ae 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -474,6 +474,15 @@
};
};
+ spi0 {
+ pinctrl_spi0: spi0-0 {
+ atmel,pins =
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
+ AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
@@ -574,6 +583,17 @@
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
+
+ spi0: spi@fffe0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffe0000 0x200>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0>;
+ status = "disabled";
+ };
};
nand0: nand@40000000 {