summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/at91sam9x5_can.dtsi
diff options
context:
space:
mode:
authorAlexander Stein <alexander.stein@systec-electronic.com>2014-10-07 13:51:50 +0200
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-11-03 11:34:32 +0100
commit316a88da4c327931958f92c4b2f1ee268215fc1b (patch)
tree6d5cb512566591a645cda2726514b9fd90697e93 /arch/arm/boot/dts/at91sam9x5_can.dtsi
parent5563d3489692a7f4239aca78b95d2a05a21d0d6a (diff)
ARM: at91/dt: at91sam9x5: Add CAN device nodes
Add the missing CAN devices node including their pin muxing to the shared .dtsi for at91sam9x5. Actually include this file. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9x5_can.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9x5_can.dtsi40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5_can.dtsi b/arch/arm/boot/dts/at91sam9x5_can.dtsi
index ebe4147529bb..8eb2f9c1b978 100644
--- a/arch/arm/boot/dts/at91sam9x5_can.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_can.dtsi
@@ -26,6 +26,46 @@
};
};
};
+
+ can0: can@f8000000 {
+ compatible = "atmel,at91sam9x5-can";
+ reg = <0xf8000000 0x300>;
+ interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can0_rx_tx>;
+ clocks = <&can0_clk>;
+ clock-names = "can_clk";
+ status = "disabled";
+ };
+
+ can1: can@f8004000 {
+ compatible = "atmel,at91sam9x5-can";
+ reg = <0xf8004000 0x300>;
+ interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1_rx_tx>;
+ clocks = <&can1_clk>;
+ clock-names = "can_clk";
+ status = "disabled";
+ };
+
+ pinctrl@fffff400 {
+ can0 {
+ pinctrl_can0_rx_tx: can0_rx_tx {
+ atmel,pins =
+ <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0, conflicts with DRXD */
+ AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX0, conflicts with DTXD */
+ };
+ };
+
+ can1 {
+ pinctrl_can1_rx_tx: can1_rx_tx {
+ atmel,pins =
+ <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1, conflicts with RXD1 */
+ AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX1, conflicts with TXD1 */
+ };
+ };
+ };
};
};
};