diff options
| author | Krzysztof Kozlowski <krzk@kernel.org> | 2016-09-16 23:41:57 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2016-11-03 22:44:55 +0200 |
| commit | 9645ab2cbc1a619a3456a28041a207b37cb5100d (patch) | |
| tree | 73db521d107ce91dfa42c4415edd79b6cb6e65c6 /arch/arm/boot/dts/exynos3250-pinctrl.dtsi | |
| parent | c473c9a180446385c3e70e79deb1fb4d559fc5da (diff) | |
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos3250
Replace hard-coded values of type of GIC interrupt and its flags with
respective macros from header to increase code readability.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos3250-pinctrl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index 450127d46acd..a149f148e659 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -362,14 +362,14 @@ interrupt-controller; interrupt-parent = <&gic>; - interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, - <0 33 IRQ_TYPE_LEVEL_HIGH>, - <0 34 IRQ_TYPE_LEVEL_HIGH>, - <0 35 IRQ_TYPE_LEVEL_HIGH>, - <0 36 IRQ_TYPE_LEVEL_HIGH>, - <0 37 IRQ_TYPE_LEVEL_HIGH>, - <0 38 IRQ_TYPE_LEVEL_HIGH>, - <0 39 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; @@ -379,14 +379,14 @@ interrupt-controller; interrupt-parent = <&gic>; - interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>, - <0 41 IRQ_TYPE_LEVEL_HIGH>, - <0 42 IRQ_TYPE_LEVEL_HIGH>, - <0 43 IRQ_TYPE_LEVEL_HIGH>, - <0 44 IRQ_TYPE_LEVEL_HIGH>, - <0 45 IRQ_TYPE_LEVEL_HIGH>, - <0 46 IRQ_TYPE_LEVEL_HIGH>, - <0 47 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; |