diff options
| author | Chanwoo Choi <cw00.choi@samsung.com> | 2014-07-30 07:57:32 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-07-30 07:57:32 +0900 |
| commit | a9408a6bba0de106d702fe5fa36fdc545116e9ab (patch) | |
| tree | a984d5502b051d35817b7ab19336b570a9fbd36d /arch/arm/boot/dts/exynos3250.dtsi | |
| parent | 81632461f3dad24d9896ec8bc1fbdd6850cc1909 (diff) | |
ARM: dts: Add missing pinctrl for uart0/1 for exynos3250
This patch add missing pinctrl for uart0/1 for Exynos3250. The gpio pin (
uart0_data, uart0_fctl, uart1_data) is only used for UART IP.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos3250.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/exynos3250.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 5043178af395..abd6eb31b2c2 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -284,6 +284,8 @@ interrupts = <0 109 0>; clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_data &uart0_fctl>; status = "disabled"; }; @@ -293,6 +295,8 @@ interrupts = <0 110 0>; clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_data>; status = "disabled"; }; |