diff options
| author | Tomeu Vizoso <tomeu.vizoso@collabora.com> | 2015-10-15 12:31:24 +0200 |
|---|---|---|
| committer | Kukjin Kim <kgene@kernel.org> | 2015-10-24 04:31:47 +0900 |
| commit | 69636a85df476f09ed34cff829039ad20cf59fce (patch) | |
| tree | 553c7e36026e1b06ed94046d16009487bab946a2 /arch/arm/boot/dts/exynos5250.dtsi | |
| parent | ae8a2881b5336aa96aea937ba3610d5a6dd32a26 (diff) | |
ARM: dts: Add clocks to DISP1 domain in exynos5250
Adds to the node of the DISP1 power domain the two clocks that need to
be reparented while the domain is powered off:
CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB.
Otherwise the state is unknown at power up and the mixer's clocks are
all messed up.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Link: http://lkml.kernel.org/g/561CDC33.7050103@collabora.com
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5250.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/exynos5250.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index b24610ea8c2a..88b9cf5f226f 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -130,6 +130,10 @@ compatible = "samsung,exynos4210-pd"; reg = <0x100440A0 0x20>; #power-domain-cells = <0>; + clocks = <&clock CLK_FIN_PLL>, + <&clock CLK_MOUT_ACLK200_DISP1_SUB>, + <&clock CLK_MOUT_ACLK300_DISP1_SUB>; + clock-names = "oscclk", "clk0", "clk1"; }; clock: clock-controller@10010000 { |