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authorLinus Walleij <linus.walleij@linaro.org>2017-04-21 20:50:22 +0200
committerLinus Walleij <linus.walleij@linaro.org>2018-12-08 23:20:10 +0100
commitd6d0cef55e5b6362bd7e4fe81ea3ac1e5a48b3f4 (patch)
treec93e80c31a62eb20c1bf6867c9a4e91a58da9b11 /arch/arm/boot/dts/gemini.dtsi
parentd88b11ef91b15d0af9c0676cbf4f441a0dff0c56 (diff)
ARM: dts: Add the FOTG210 USB host to Gemini boards
This adds the FOTG210 USB host controller to the Gemini device trees. In the main SoC DTSI it is flagged as disabled and then it is selectively enabled on the devices that utilize it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/gemini.dtsi')
-rw-r--r--arch/arm/boot/dts/gemini.dtsi32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi
index eb752e9495de..8cf67b11751f 100644
--- a/arch/arm/boot/dts/gemini.dtsi
+++ b/arch/arm/boot/dts/gemini.dtsi
@@ -409,5 +409,37 @@
#size-cells = <0>;
status = "disabled";
};
+
+ usb@68000000 {
+ compatible = "cortina,gemini-usb", "faraday,fotg210";
+ reg = <0x68000000 0x1000>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_USB0>;
+ clocks = <&syscon GEMINI_CLK_GATE_USB0>;
+ clock-names = "PCLK";
+ /*
+ * This will claim pins for USB0 and USB1 at the same
+ * time as they are using some common pins. If you for
+ * some reason have a system using USB1 at 96000000 but
+ * NOT using USB0 at 68000000 you wll have to add the
+ * usb_default_pins to the USB controller at 96000000
+ * in your .dts for the board.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_default_pins>;
+ syscon = <&syscon>;
+ status = "disabled";
+ };
+
+ usb@69000000 {
+ compatible = "cortina,gemini-usb", "faraday,fotg210";
+ reg = <0x69000000 0x1000>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_USB1>;
+ clocks = <&syscon GEMINI_CLK_GATE_USB1>;
+ clock-names = "PCLK";
+ syscon = <&syscon>;
+ status = "disabled";
+ };
};
};