diff options
author | Philippe Reynes <tremyfr@gmail.com> | 2014-09-01 20:44:32 +0200 |
---|---|---|
committer | Shawn Guo <shawn.guo@freescale.com> | 2014-09-02 21:51:57 +0800 |
commit | 1aed64b0397e28deb5433621f137614ab4d1bb65 (patch) | |
tree | 0d605ede1d233e2d24130e8b0f6ad072d72e40ec /arch/arm/boot/dts/imx27-apf27dev.dts | |
parent | b1b40fcc7e1568681db2d0293d3822ce64694e72 (diff) |
ARM: dts: apf27dev: add max1027 in the dts
Signed-off-by: Philippe Reynes <tremyfr@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx27-apf27dev.dts')
-rw-r--r-- | arch/arm/boot/dts/imx27-apf27dev.dts | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts b/arch/arm/boot/dts/imx27-apf27dev.dts index 2b6d489dae69..da306c5dd678 100644 --- a/arch/arm/boot/dts/imx27-apf27dev.dts +++ b/arch/arm/boot/dts/imx27-apf27dev.dts @@ -67,6 +67,16 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>; status = "okay"; + + adc@0 { + compatible = "maxim,max1027"; + reg = <0>; + interrupt-parent = <&gpio5>; + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_max1027>; + spi-max-frequency = <10000000>; + }; }; &cspi2 { @@ -189,6 +199,13 @@ >; }; + pinctrl_max1027: max1027 { + fsl,pins = < + MX27_PAD_UART1_CTS__GPIO5_14 0x0 /* CNVST */ + MX27_PAD_UART1_RTS__GPIO5_15 0x0 /* EOC */ + >; + }; + pinctrl_pwm: pwmgrp { fsl,pins = < MX27_PAD_PWMO__PWMO 0x0 |