summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
diff options
context:
space:
mode:
authorAlexander Shiyan <shc_work@mail.ru>2013-12-21 11:11:42 +0400
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 21:33:35 +0800
commit3c6c9eeb143d65c86be7789daf8e81c3ba5b7a9b (patch)
tree670656573f58c8ff5ef1c98b65786a145a828230 /arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
parent836ac7831d52274dcd1d7f76b0e12215bbac8388 (diff)
ARM: dts: imx27-phytec-phycore-rdk: Add pinctrl definitions for WEIM
This patch adds pinctrl definitions for WEIM CS4 and GPIO used as CAN IRQ line. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts')
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
index 9997f58a4d14..9f8ad51d2ed9 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -80,6 +80,13 @@
MX27_PAD_UART2_RTS__UART2_RTS 0x0
>;
};
+
+ pinctrl_weim: weimgrp {
+ fsl,pins = <
+ MX27_PAD_CS4_B__CS4_B 0x0 /* CS4 */
+ MX27_PAD_SD1_D1__GPIO5_19 0x0 /* CAN IRQ */
+ >;
+ };
};
};
@@ -114,6 +121,9 @@
};
&weim {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_weim>;
+
can@d4000000 {
compatible = "nxp,sja1000";
reg = <4 0x00000000 0x00000100>;