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authorFabio Estevam <fabio.estevam@nxp.com>2017-11-25 20:51:07 -0200
committerShawn Guo <shawnguo@kernel.org>2017-12-26 16:15:44 +0800
commitc709ddfac84003b41dfef8dd81fe9c16c44edfc7 (patch)
tree558b8cf2e0c7f0cb9df24207386faf667ecd59c5 /arch/arm/boot/dts/imx53-cx9020.dts
parentdd254dec647578607832870f48b193db5d34988e (diff)
ARM: dts: imx53-cx9020: Fix the Ethernet PHY reset GPIO polarity
As explained in Documentation/devicetree/bindings/net/fsl-fec.txt the phy-reset-gpios is active high only if the 'phy-reset-active-high' is present. As 'phy-reset-active-high' is not used here, fix the device tree description by passing GPIO_ACTIVE_LOW flag. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Patrick Bruenn <p.bruenn@beckhoff.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx53-cx9020.dts')
-rw-r--r--arch/arm/boot/dts/imx53-cx9020.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx53-cx9020.dts b/arch/arm/boot/dts/imx53-cx9020.dts
index 4f54fd4418a3..5e67e43004e7 100644
--- a/arch/arm/boot/dts/imx53-cx9020.dts
+++ b/arch/arm/boot/dts/imx53-cx9020.dts
@@ -152,7 +152,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
- phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
+ phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay";
};