ARM: dts: Add initial Iris devicetrees

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
(cherry picked from commit ec4c646d6456a13fafb0e0d76dd60f418207a241)

1 files changed, 201 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris.dts b/arch/arm/boot/dts/imx6dl-colibri-iris.dts
new file mode 100644
index 000000000000..1d8f3564c5a5
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-colibri-iris.dts
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2019 Toradex
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "imx6dl.dtsi"
+#include "imx6qdl-colibri.dtsi"
+
+/ {
+	model = "Toradex Colibri iMX6DL/S on Colibri Iris Board";
+	compatible = "toradex,colibri_imx6dl-iris", \
+			"toradex,colibri_imx6dl", "fsl,imx6dl";
+
+	extcon_usbc_det: usbc_det {
+		compatible = "linux,extcon-usb-gpio";
+		debounce = <25>;
+		id-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usbc_det>;
+	};
+};
+
+&backlight {
+	#if 0 /* PWM polarity: if 1 is brightest */
+		pwms = <&pwm3 0 5000000 0>;
+	#if 0 /* Fusion 7 needs 10kHz PWM frequency */
+		pwms = <&pwm3 0 100000 0>;
+	#endif
+	#else /* PWM polarity: if 0 is brightest */
+		pwms = <&pwm3 0 5000000 1>;
+	#endif
+	brightness-levels = <0 127 191 223 239 247 251 255>;
+	default-brightness-level = <1>;
+	status = "okay";
+};
+
+/* Colibri SSP */
+&ecspi4 {
+	status = "okay";
+
+	spidev0: spidev@1 {
+		compatible = "toradex,evalspi";
+		reg = <0>;
+		spi-max-frequency = <23000000>;
+		status = "okay";
+	};
+};
+
+/*
+ * I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier
+ * board)
+ */
+&i2c3 {
+	status = "okay";
+
+	/* Atmel maxtouch controller */
+	atmel_mxt_ts: atmel_mxt_ts@4a {
+		compatible = "atmel,maxtouch";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_mxt_ts>;
+		reg = <0x4a>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <24 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */
+		reset-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */
+		status = "okay";
+	};
+
+	/* M41T0M6 real time clock on carrier board */
+	rtc_i2c: rtc@68 {
+		compatible = "st,m41t0";
+		reg = <0x68>;
+	};
+};
+
+&lcd {
+	status = "okay";
+};
+
+&mxcfb1 {
+	status = "okay";
+};
+
+&mxcfb2 {
+	status = "okay";
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+&pwm3 {
+	status = "okay";
+};
+
+&pwm4 {
+	status = "okay";
+};
+
+&reg_usb_host_vbus {
+	status = "okay";
+};
+
+/* Colibri UART_A */
+&uart1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl
+			&pinctrl_uart1_forceoff>;
+};
+
+/* Colibri UART_B */
+&uart2 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2_dte &pinctrl_uart23_forceoff>;
+};
+
+/* Colibri UART_C */
+&uart3 {
+	status = "okay";
+	/*
+	 * Note that UART3 is on the same tranceiver as UART2 and this needs
+	 * to be enabled with the pinmuxing &pinctrl_uart23_forceoff
+	 */
+};
+
+&usbh1 {
+	vbus-supply = <&reg_usb_host_vbus>;
+	status = "okay";
+};
+
+&usbotg {
+	status = "okay";
+	extcon = <&extcon_usbc_det>, <&extcon_usbc_det>;
+};
+
+&usdhc1 {
+	status = "okay";
+};
+
+&gpio1 {
+	/*
+	 * This turns the LVDS transceiver on. If one wants to turn the
+	 * transceiver off, that property has to be deleted and the gpio handled
+	 * in userspace.
+	 */
+	lvds_tx_on {
+		gpio-hog;
+		gpios = <12 0>;
+		output-high;
+	};
+};
+
+&iomuxc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gpio_iris>;
+
+	gpio {
+		pinctrl_mxt_ts: mxt-ts {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_CS1__GPIO2_IO24	0x130b0 /* SODIMM 107 */
+				MX6QDL_PAD_SD2_DAT1__GPIO1_IO14	0x130b0 /* SODIMM 106 */
+			>;
+		};
+
+		pinctrl_gpio_iris: gpio-iris {
+			fsl,pins = <
+				MX6QDL_PAD_SD2_DAT0__GPIO1_IO15	0x1b0b0 /* SODIMM 98 */
+				MX6QDL_PAD_NANDF_D3__GPIO2_IO03	0x1b0b0 /* SODIMM 133 */
+				MX6QDL_PAD_EIM_A18__GPIO2_IO20	0x1b0b0 /* SODIMM 103 */
+				MX6QDL_PAD_EIM_A17__GPIO2_IO21	0x1b0b0 /* SODIMM 101 */
+				MX6QDL_PAD_EIM_A20__GPIO2_IO18	0x1b0b0 /* SODIMM 97 */
+				MX6QDL_PAD_EIM_A23__GPIO6_IO06	0x1b0b0 /* SODIMM 85 */
+				MX6QDL_PAD_EIM_A19__GPIO2_IO19	0x1b0b0 /* SODIMM 79 */
+				MX6QDL_PAD_EIM_A16__GPIO2_IO22	0x1b0b0 /* SODIMM 45 */
+			>;
+		};
+	};
+
+	uart {
+		pinctrl_uart1_forceoff: uart1_forceoff {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
+			>;
+		};
+
+		pinctrl_uart23_forceoff: uart23_forceoff {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
+			>;
+		};
+	};
+};