diff options
| author | Li Jun <b47624@freescale.com> | 2015-01-20 16:03:36 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 10:57:03 -0600 |
| commit | 9513eb8891d76f83ed064f6d5233337a3f02db2a (patch) | |
| tree | d42ca89db8defb7e253dbe18cd8f7005969b5e66 /arch/arm/boot/dts/imx6q-arm2.dts | |
| parent | bdf4e6a4ba5183ff42e9d30045df6f93cf840fe7 (diff) | |
MLK-10086-2 ARM: imx6: add dts entries for hsic controller
- Add usbphy_nop, hsic uses nop phy driver
- Add anatop phandle, hsic needs to access anatop register to
change osc clock for different boards
- Add phy_type, hsic needs to config PHY parameters at portsc
- For imx6q-arm2 board, hsic has pin conflict with ethernet, we create a
dedicated dts(imx6q-arm2-hsic.dts) for it with ethernet disabled, besides
please make sure keep the line of data and strobe unchanged between board
boots up and enable hsic controller.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 2f8a266d271874cd398d14556752ab4ab0be27ba)
Diffstat (limited to 'arch/arm/boot/dts/imx6q-arm2.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6q-arm2.dts | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts index d6515f7a56c4..da8bcd8b1aec 100644 --- a/arch/arm/boot/dts/imx6q-arm2.dts +++ b/arch/arm/boot/dts/imx6q-arm2.dts @@ -140,6 +140,32 @@ >; }; + pinctrl_usbh2_1: usbh2grp-1 { + fsl,pins = < + MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x40013030 + MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40013030 + >; + }; + + pinctrl_usbh2_2: usbh2grp-2 { + fsl,pins = < + MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40017030 + >; + }; + + pinctrl_usbh3_1: usbh3grp-1 { + fsl,pins = < + MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x40013030 + MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40013030 + >; + }; + + pinctrl_usbh3_2: usbh3grp-2 { + fsl,pins = < + MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40017030 + >; + }; + pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 |