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authorAdrian Alonso <adrian.alonso@nxp.com>2016-01-11 10:39:20 -0600
committerAdrian Alonso <adrian.alonso@nxp.com>2016-09-15 15:48:19 -0500
commitf7502a8455f5563766c6d7d37d9e1a81dd8f335f (patch)
tree98bee65327f9d2b9b8f0cc4fb72664837e4a9c09 /arch/arm/boot/dts/imx6q-pop-arm2.dts
parentc009bce246fb1196a056787680004c6dcbf8ee62 (diff)
MLK-13182-2: ARM: dts: imx: enable lvds support for imx6q pop arm2
Enable lvds channel 0 display support for imx6q pop arm2 validation target board. Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> (Cherry picked from commit a450661ac8bd928d1b27839f1a2a334528acb40f)
Diffstat (limited to 'arch/arm/boot/dts/imx6q-pop-arm2.dts')
-rw-r--r--arch/arm/boot/dts/imx6q-pop-arm2.dts123
1 files changed, 123 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-pop-arm2.dts b/arch/arm/boot/dts/imx6q-pop-arm2.dts
index 8ab1d4041c43..388f51e3fedb 100644
--- a/arch/arm/boot/dts/imx6q-pop-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-pop-arm2.dts
@@ -18,6 +18,35 @@
aliases {
mxcfb0 = &mxcfb1;
+ mxcfb1 = &mxcfb2;
+ };
+
+ pwm-backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 50000>;
+ power-supply = <&reg_lvds_3p3v>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7 8 9
+ 10 11 12 13 14 15 16 17 18 19
+ 20 21 22 23 24 25 26 27 28 29
+ 30 31 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47 48 49
+ 50 51 52 53 54 55 56 57 58 59
+ 60 61 62 63 64 65 66 67 68 69
+ 70 71 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87 88 89
+ 90 91 92 93 94 95 96 97 98 99
+ 100
+ >;
+ default-brightness-level = <94>;
+ status = "okay";
+ };
+
+ hannstar_cabc {
+ compatible = "hannstar,cabc";
+ lvds_share {
+ gpios = <&max7310_a 0 GPIO_ACTIVE_HIGH>;
+ };
};
memory {
@@ -27,6 +56,16 @@
mxcfb1: fb@0 {
compatible = "fsl,mxc_sdc_fb";
+ disp_dev = "ldb";
+ interface_pix_fmt = "RGB666";
+ default_bpp = <16>;
+ int_clk = <0>;
+ late_init = <0>;
+ status = "okay";
+ };
+
+ mxcfb2: fb@1 {
+ compatible = "fsl,mxc_sdc_fb";
disp_dev = "hdmi";
interface_pix_fmt = "RGB24";
mode_str = "1920x1080M@60";
@@ -65,6 +104,17 @@
gpio = <&gpio3 22 0>;
enable-active-high;
};
+
+ reg_lvds_3p3v: regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "LVDS-3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&max7310_b 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
};
};
@@ -78,6 +128,12 @@
status = "okay";
};
+&dcic2 {
+ dcic_id = <1>;
+ dcic_mux = "dcic-lvds0";
+ status = "okay";
+};
+
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
@@ -119,6 +175,27 @@
};
};
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+
+ max7310_a: gpio@1b {
+ compatible = "maxim,max7310";
+ reg = <0x1b>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ max7310_b: gpio@1f {
+ compatible = "maxim,max7310";
+ reg = <0x1f>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
@@ -170,6 +247,19 @@
>;
};
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
+ >;
+ };
+
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
@@ -231,6 +321,39 @@
};
};
+&ldb {
+ status = "okay";
+
+ lvds-channel@0 {
+ fsl,data-mapping = "spwg";
+ fsl,data-width = <18>;
+ crtc = "ipu2-di0";
+ primary;
+ status = "okay";
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: hsd100pxn1 {
+ clock-frequency = <65000000>;
+ hactive = <1024>;
+ vactive = <768>;
+ hback-porch = <220>;
+ hfront-porch = <40>;
+ vback-porch = <21>;
+ vfront-porch = <7>;
+ hsync-len = <60>;
+ vsync-len = <10>;
+ };
+ };
+ };
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;