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authorFabio Estevam <festevam@gmail.com>2012-04-24 20:35:36 -0300
committerShawn Guo <shawn.guo@linaro.org>2012-05-11 15:17:54 +0800
commitf07439c43252c3c2e669a5ee3762f4559179828d (patch)
treef3d8f2f14ebeaa707063f881a524847f0230641a /arch/arm/boot/dts/imx6q-sabrelite.dts
parent691d26408734e7a41ebdadd19c10f6c0949ecd4a (diff)
ARM: dts: imx6q-sabrelite: Add SPI NOR support
mx6qsabrelite has a sst25vf016b SPI NOR flash connected to eCSPI1. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6q-sabrelite.dts')
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index a93c593fed8f..1ca9b3ecb882 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -22,6 +22,23 @@
};
soc {
+ aips-bus@02000000 { /* AIPS1 */
+ spba-bus@02000000 {
+ ecspi@02008000 { /* eCSPI1 */
+ fsl,spi-num-chipselects = <1>;
+ cs-gpios = <&gpio3 19 0>;
+ status = "okay";
+
+ flash: m25p80@0 {
+ compatible = "sst,sst25vf016b";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+ };
+ };
+
+ };
+
aips-bus@02100000 { /* AIPS2 */
ethernet@02188000 {
phy-mode = "rgmii";