diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2016-08-25 20:43:33 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2016-08-25 20:45:55 +0800 |
| commit | 122438408ff809eba39c413d250f0000f8d89fdb (patch) | |
| tree | 0c20d84aae6f4cb66f7f249049966daa51f7f210 /arch/arm/boot/dts/imx6q.dtsi | |
| parent | ead9ad7548f6dc765d5fa361b16439fed3434c80 (diff) | |
MLK-13119-1 ARM: dts: imx6q: add vpu clock for cpu frequency
When VPU is running at 396MHz, need to increase
VDDSOC_CAP voltage for all cpu set-points, so add
vpu clock node for cpufreq driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 6d7b6605fea4..f212203408ac 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -51,10 +51,12 @@ <&clks IMX6QDL_CLK_PLL1_SYS>, <&clks IMX6QDL_CLK_PLL1>, <&clks IMX6QDL_PLL1_BYPASS>, - <&clks IMX6QDL_PLL1_BYPASS_SRC>; + <&clks IMX6QDL_PLL1_BYPASS_SRC>, + <&clks IMX6QDL_CLK_VPU_AXI_PODF>; clock-names = "arm", "pll2_pfd2_396m", "step", "pll1_sw", "pll1_sys", "pll1", - "pll1_bypass", "pll1_bypass_src"; + "pll1_bypass", "pll1_bypass_src", + "vpu_axi_podf"; arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; |