diff options
| author | Jagan Teki <jagan@amarulasolutions.com> | 2017-09-18 16:58:33 +0530 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2017-10-13 11:04:09 +0800 |
| commit | 0ec7a7d3370cec2fcd5edc1f247c76e344eccc40 (patch) | |
| tree | cd9188f3f6a3de5a27b2d086e3e39eac4b0fd79e /arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | |
| parent | c983a9137eca90be7639bc1d667132f6759513d4 (diff) | |
ARM: dts: imx6qdl-icore-rqs: Add CAN nodes
Add support for can1 and can2 nodes on Engicam i.CoreM6 RQS
QDL module boards.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi index e97002b674c4..b6220d62f6de 100644 --- a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi @@ -173,6 +173,20 @@ }; }; +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + xceiver-supply = <®_3p3v>; + status = "okay"; +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can2>; + xceiver-supply = <®_3p3v>; + status = "okay"; +}; + &clks { assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>; assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>; @@ -328,6 +342,20 @@ >; }; + pinctrl_can1: can1grp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020 + >; + }; + + pinctrl_can2: can2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b020 + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b020 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 |