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authorHuang Shijie <b32955@freescale.com>2013-05-28 14:20:08 +0800
committerShawn Guo <shawn.guo@linaro.org>2013-06-17 16:04:29 +0800
commit72eb4cca7844c600f2e839c2e27a16c1eaa213f9 (patch)
tree993cac83fd7407668deb27c58a9d76f4b4dd47da /arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
parent85bf6d4e4b100efda8169f6f98fd65d0029c7813 (diff)
ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM
In the imx6q-sabreauto and imx6dl-sabreauto boards, the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but it is used as a data pin for the WEIM NOR. In order to fix the conflict, this patch removes the pin from the hog, and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto. The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabreauto.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabreauto.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index d6baa51dc83c..a4466e6ebe33 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -20,7 +20,7 @@
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1_1>;
+ pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_sabreauto>;
status = "disabled"; /* pin conflict with WEIM NOR */
flash: m25p80@0 {