diff options
author | Robin Gong <b38343@freescale.com> | 2015-10-12 16:23:34 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:23:28 +0800 |
commit | fac85303eecf42ee208d341709fa91ec9607c56c (patch) | |
tree | baf626b1432dcf1516fa6e81a6e212cac8e1a748 /arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | |
parent | ac558bd121b5970658aaa2ad4394c36c658d85bb (diff) |
MLK-11693-1: ARM: dts: imx6qdl-sabreauto: add gpio keys
add gpio keys, please attach main board to test this function, since those
gpio pins are located on main board.
Signed-off-by: Robin Gong <b38343@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabreauto.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index 0a72616f6763..285f8ffc6ed5 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -11,6 +11,7 @@ */ #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> / { aliases { @@ -20,6 +21,47 @@ mxcfb3 = &mxcfb4; }; + gpio-keys { + compatible = "gpio-keys1"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + + home { + label = "Home"; + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = <KEY_HOME>; + }; + + back { + label = "Back"; + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = <KEY_BACK>; + }; + + program { + label = "Program"; + gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = <KEY_PROGRAM>; + }; + + volume-up { + label = "Volume Up"; + gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = <KEY_VOLUMEUP>; + }; + + volume-down { + label = "Volume Down"; + gpios = <&gpio5 14 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + linux,code = <KEY_VOLUMEDOWN>; + }; + }; + memory: memory { reg = <0x10000000 0x80000000>; }; @@ -669,6 +711,16 @@ >; }; + pinctrl_gpio_keys: gpio_keysgrp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0 + MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0 + MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0 + MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 + MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0 + >; + }; + pinctrl_gpio_leds: gpioledsgrp { fsl,pins = < MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x80000000 |