diff options
| author | Fugang Duan <b38611@freescale.com> | 2014-09-09 14:36:12 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 11:00:09 -0600 |
| commit | a7d805c92c93c11469ba6f1d6f09c1473813a248 (patch) | |
| tree | 51876084a712068204a3bf9d97f2726e0e726f7a /arch/arm/boot/dts/imx6qdl-sabresd.dtsi | |
| parent | 7784b0c04dfd3a6627954788fc51ebff9679a86c (diff) | |
MLK-11457-02 ARM: dts: imx6q: add uart5 dte set for sabresd board
Add uart5 DTE mode pinctrl set for imx6q-sabresd board. Since there
have pin confliction, so add new dts file.
(cherry picked from commit d63b40d5b1b05992d2328ef0bdc80ec5d96f2dce)
Signed-off-by: Fugang Duan <B38611@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabresd.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 9da86f0e19c9..b47cf4da7ce3 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -432,6 +432,24 @@ >; }; + pinctrl_uart5_1: uart5grp-1 { + fsl,pins = < + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_COL4__UART5_RTS_B 0x1b0b1 + MX6QDL_PAD_KEY_ROW4__UART5_CTS_B 0x1b0b1 + >; + }; + + pinctrl_uart5dte_1: uart5dtegrp-1 { + fsl,pins = < + MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW4__UART5_RTS_B 0x1b0b1 + MX6QDL_PAD_KEY_COL4__UART5_CTS_B 0x1b0b1 + >; + }; + pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 |