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authorFugang Duan <b38611@freescale.com>2014-09-09 14:36:12 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:22:58 +0800
commit039d2caa5724601c0356d228874046dab634ea08 (patch)
tree1d7ab5198e86c5eef4f9bc9004138986c1fc117e /arch/arm/boot/dts/imx6qdl-sabresd.dtsi
parent7339c2638bc40bc5454b3bb3632584e5ec50be9a (diff)
MLK-11457-02 ARM: dts: imx6q: add uart5 dte set for sabresd board
Add uart5 DTE mode pinctrl set for imx6q-sabresd board. Since there have pin confliction, so add new dts file. (cherry picked from commit d63b40d5b1b05992d2328ef0bdc80ec5d96f2dce) Signed-off-by: Fugang Duan <B38611@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabresd.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index e9403ebb7955..f99f621a8a75 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -562,6 +562,24 @@
>;
};
+ pinctrl_uart5_1: uart5grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_COL4__UART5_RTS_B 0x1b0b1
+ MX6QDL_PAD_KEY_ROW4__UART5_CTS_B 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart5dte_1: uart5dtegrp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW4__UART5_RTS_B 0x1b0b1
+ MX6QDL_PAD_KEY_COL4__UART5_CTS_B 0x1b0b1
+ >;
+ };
+
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059