diff options
| author | Fugang Duan <b38611@freescale.com> | 2014-09-09 14:36:12 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:06:01 +0800 |
| commit | b8dfe837841cfc6988400dfd32288da9f73af6d1 (patch) | |
| tree | c17ee2ece347fbfbd4fa8d9c1d381d67eef40774 /arch/arm/boot/dts/imx6qdl-sabresd.dtsi | |
| parent | f5f2f1e63e25fa5a29668a8c795c352c8d8ccf3f (diff) | |
MLK-11457-02 ARM: dts: imx6q: add uart5 dte set for sabresd board
Add uart5 DTE mode pinctrl set for imx6q-sabresd board. Since there
have pin confliction, so add new dts file.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit d63b40d5b1b05992d2328ef0bdc80ec5d96f2dce)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabresd.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index c4195ceacbc0..02f30658e996 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -635,6 +635,24 @@ >; }; + pinctrl_uart5_1: uart5grp-1 { + fsl,pins = < + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_COL4__UART5_RTS_B 0x1b0b1 + MX6QDL_PAD_KEY_ROW4__UART5_CTS_B 0x1b0b1 + >; + }; + + pinctrl_uart5dte_1: uart5dtegrp-1 { + fsl,pins = < + MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW4__UART5_RTS_B 0x1b0b1 + MX6QDL_PAD_KEY_COL4__UART5_CTS_B 0x1b0b1 + >; + }; + pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 |