diff options
| author | Huang Shijie <b32955@freescale.com> | 2013-06-21 10:19:11 +0800 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-08-22 23:28:15 +0800 |
| commit | 9110ede4e0240ba54633cde1c1eaf7da3523df78 (patch) | |
| tree | 87b6f22fd16d751c71b284931f6883d2c2df2d28 /arch/arm/boot/dts/imx6qdl-sabresd.dtsi | |
| parent | b038a9b886833ebdacd941f2a50b629d36eea133 (diff) | |
ARM: dts: imx6qdl-sabresd: enable the SPI NOR
enable the spi nor for imx6q{dl}-sabresd boards.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabresd.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 6e5dfdb32416..4dec80c4f991 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -77,6 +77,22 @@ status = "okay"; }; +&ecspi1 { + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio4 9 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1_2>; + status = "okay"; + + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p32"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet_1>; |