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authorLothar Waßmann <LW@KARO-electronics.de>2017-10-17 11:17:57 +0200
committerShawn Guo <shawnguo@kernel.org>2017-10-23 08:19:45 +0800
commit9b2d84058445ae826548e2ba4f08b551b251d06f (patch)
tree5986d918db859cf682474297a2991a808ea3bd1a /arch/arm/boot/dts/imx6qdl-tx6.dtsi
parent3fd415af1805b4906deaedb8150017e457ff0df7 (diff)
ARM: dts: imx6-tx6: specify ethernet phy reset post-delay
Under certain circumstances the ethernet PHY cannot be detected on Ka-Ro electronics TX6 modules. Using a phy-reset-post-delay of at least 2ms alleviates this problem. Define it to 10ms to be on the safe side. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-tx6.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-tx6.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi
index f2cd3e77c536..f1655b3ba1ad 100644
--- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi
@@ -249,6 +249,7 @@
clock-names = "ipg", "ahb", "ptp", "enet_out";
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
+ phy-reset-post-delay = <10>;
phy-handle = <&etnphy>;
phy-supply = <&reg_3v3_etn>;
status = "okay";