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authorFabio Estevam <fabio.estevam@nxp.com>2017-11-29 16:54:35 -0200
committerShawn Guo <shawnguo@kernel.org>2017-12-26 16:15:44 +0800
commit1e98960372460bead9d0a7329b2a9615b71ed397 (patch)
treea626b98013184877a61b93ce9998fd73d914149a /arch/arm/boot/dts/imx6qdl.dtsi
parent5b2327446c81a1a832f802595ff8b3afeaec35ce (diff)
ARM: dts: imx6: Move nodes which have no reg property out of bus
Move tempmon, ldb and pmu nodes from soc node to root node. The nodes that have been moved do not have any register properties and thus shouldn't be placed on the bus. This fixes the following build warnings with W=1: arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (simple_bus_reg): Node /soc/aips-bus@2000000/tempmon missing or empty reg/ranges property arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (simple_bus_reg): Node /soc/aips-bus@2000000/ldb missing or empty reg/ranges property arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (simple_bus_reg): Node /soc/pmu missing or empty reg/ranges property Based on a patch from Simon Horman for r8a7795.dtsi. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi136
1 files changed, 69 insertions, 67 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 260b3b6ed425..63975a42d65c 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -80,6 +80,75 @@
};
};
+ tempmon: tempmon {
+ compatible = "fsl,imx6q-tempmon";
+ interrupt-parent = <&gpc>;
+ interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,tempmon = <&anatop>;
+ fsl,tempmon-data = <&ocotp>;
+ clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
+ };
+
+ ldb: ldb {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
+ gpr = <&gpr>;
+ status = "disabled";
+
+ lvds-channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "disabled";
+
+ port@0 {
+ reg = <0>;
+
+ lvds0_mux_0: endpoint {
+ remote-endpoint = <&ipu1_di0_lvds0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lvds0_mux_1: endpoint {
+ remote-endpoint = <&ipu1_di1_lvds0>;
+ };
+ };
+ };
+
+ lvds-channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ status = "disabled";
+
+ port@0 {
+ reg = <0>;
+
+ lvds1_mux_0: endpoint {
+ remote-endpoint = <&ipu1_di0_lvds1>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lvds1_mux_1: endpoint {
+ remote-endpoint = <&ipu1_di1_lvds1>;
+ };
+ };
+ };
+ };
+
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupt-parent = <&gpc>;
+ interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -224,11 +293,6 @@
status = "disabled";
};
- pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
- };
-
aips-bus@2000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
@@ -729,14 +793,6 @@
};
};
- tempmon: tempmon {
- compatible = "fsl,imx6q-tempmon";
- interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
- fsl,tempmon = <&anatop>;
- fsl,tempmon-data = <&ocotp>;
- clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
- };
-
usbphy1: usbphy@20c9000 {
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>;
@@ -845,60 +901,6 @@
reg = <0x20e0000 0x4000>;
};
- ldb: ldb {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
- gpr = <&gpr>;
- status = "disabled";
-
- lvds-channel@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- status = "disabled";
-
- port@0 {
- reg = <0>;
-
- lvds0_mux_0: endpoint {
- remote-endpoint = <&ipu1_di0_lvds0>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- lvds0_mux_1: endpoint {
- remote-endpoint = <&ipu1_di1_lvds0>;
- };
- };
- };
-
- lvds-channel@1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
- status = "disabled";
-
- port@0 {
- reg = <0>;
-
- lvds1_mux_0: endpoint {
- remote-endpoint = <&ipu1_di0_lvds1>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- lvds1_mux_1: endpoint {
- remote-endpoint = <&ipu1_di1_lvds1>;
- };
- };
- };
- };
-
dcic1: dcic@20e4000 {
reg = <0x020e4000 0x4000>;
interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;