summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/imx6qp.dtsi
diff options
context:
space:
mode:
authorLucas Stach <l.stach@pengutronix.de>2017-04-12 18:46:00 +0200
committerShawn Guo <shawnguo@kernel.org>2017-05-15 09:34:28 +0800
commit6447a053ddf6e3e42af6c8e1c65a8ec2b367abbc (patch)
tree8229152f471ef00e93dd6ffad4cd25b50fada0f3 /arch/arm/boot/dts/imx6qp.dtsi
parente761b82ef22269b4e4fdf1a4d397c09522bc5d54 (diff)
ARM: dts: imx6qp: add specific compatible for GPC
Add the more specific QuadPlus compatible to the GPC node, to trigger the required workarounds in the power domain code. In regard to the interrupt mapping the QuadPlus controller is fully compatible to the Quad one, so keep that compatible in place. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qp.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qp.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index 59453f2ac4ba..299d863690c5 100644
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -120,6 +120,10 @@
<0 119 IRQ_TYPE_LEVEL_HIGH>;
};
+&gpc {
+ compatible = "fsl,imx6qp-gpc", "fsl,imx6q-gpc";
+};
+
&ipu1 {
compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
fsl,prg = <&prg1>;