diff options
| author | Quan Zhang <spring.zhang@nxp.com> | 2016-09-06 03:34:24 +0800 |
|---|---|---|
| committer | Robby Cai <robby.cai@nxp.com> | 2016-09-14 21:21:26 +0800 |
| commit | a73bc9a0b819593b393cbdfa29b01c5d24ca4e29 (patch) | |
| tree | 2f46410376a55cd49f9de03c3a3e93e415abad38 /arch/arm/boot/dts/imx6sl.dtsi | |
| parent | 8ab2cc06a6900889bd61e8de6f5436523e8227d2 (diff) | |
MLK-13206 dcp: mx6sl: add missing components in dts
After MX6ULL DCP issue is fixed in commit 7a1cc1f, it introduces a new issue,
MX6SL will meet issue as no dcp clock is defined when initializing:
[ 3.061344] mxs-dcp 20fc000.dcp: can't identify DCP clk: -2
On mx6sl, dcp clock is always on, so the patch use dummy as dcp clock directly.
Signed-off-by: Quan Zhang <spring.zhang@nxp.com>
(cherry picked from commit 17717049a2a0a2248e30c421a0e0559a45ca59f3)
Diffstat (limited to 'arch/arm/boot/dts/imx6sl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 0cca70d71f7f..c1603dad4640 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -788,8 +788,15 @@ }; dcp: dcp@020fc000 { + compatible = "fsl,imx6sl-dcp"; reg = <0x020fc000 0x4000>; - interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>, + <0 100 IRQ_TYPE_LEVEL_HIGH>, + <0 101 IRQ_TYPE_LEVEL_HIGH>; + /* DCP clock always on */ + clocks = <&clks IMX6SL_CLK_DUMMY>; + clock-names = "dcp"; + status = "okay"; }; }; |