diff options
author | Andy Duan <fugang.duan@nxp.com> | 2016-10-31 17:18:06 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:25:10 +0800 |
commit | 3fbb808b81a3be44b2849dc89fe47b45fb3972b1 (patch) | |
tree | 69e3b75df711f8164590811c63aa14b83bb691df /arch/arm/boot/dts/imx6sll-evk.dts | |
parent | a05a7aba141a455cc8818de5599f13c5fd77ba17 (diff) |
MLK-13413 ARM: imx6sll-evk: add Murata Type ZP (BCM4339) module support
Add Murata Type ZP (BCM4339) module support on i.MX6SLL platforms:
- i.MX6SLL EVK (SD3 slot + BT connector) + Murata adapter V2.0
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sll-evk.dts')
-rw-r--r-- | arch/arm/boot/dts/imx6sll-evk.dts | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sll-evk.dts b/arch/arm/boot/dts/imx6sll-evk.dts index 78d37f71922c..4b4e339ea5a4 100644 --- a/arch/arm/boot/dts/imx6sll-evk.dts +++ b/arch/arm/boot/dts/imx6sll-evk.dts @@ -492,6 +492,25 @@ >; }; + pinctrl_uart5: uart5grp { + fsl,pins = < + MX6SLL_PAD_KEY_ROW1__GPIO3_IO27 0x1b0b1 /* bt reg on */ + MX6SLL_PAD_ECSPI1_MOSI__UART5_DCE_TX 0x1b0b1 + MX6SLL_PAD_ECSPI1_SCLK__UART5_DCE_RX 0x1b0b1 + MX6SLL_PAD_ECSPI1_SS0__UART5_DCE_CTS 0x1b0b1 + MX6SLL_PAD_ECSPI1_MISO__UART5_DCE_RTS 0x1b0b1 + >; + }; + + pinctrl_uart5dte: uart5dtegrp { + fsl,pins = < + MX6SLL_PAD_ECSPI1_MOSI__UART5_DTE_RX 0x1b0b1 + MX6SLL_PAD_ECSPI1_SCLK__UART5_DTE_TX 0x1b0b1 + MX6SLL_PAD_ECSPI1_SS0__UART5_DTE_RTS 0x1b0b1 + MX6SLL_PAD_ECSPI1_MISO__UART5_DTE_CTS 0x1b0b1 + >; + }; + pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX6SLL_PAD_SD1_CMD__SD1_CMD 0x17059 @@ -650,6 +669,16 @@ status = "okay"; }; +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + fsl,uart-has-rtscts; + /* for DTE mode, add below change */ + /* fsl,dte-mode; */ + /* pinctrl-0 = <&pinctrl_uart5dte>; */ + status = "disabled"; +}; + &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; |