diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2019-07-18 17:15:08 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2019-07-23 15:47:54 +0800 |
| commit | df7126cc42105e9df9f0182794482dc137479727 (patch) | |
| tree | 813564b9384ea891da73577681cb4262d51a7f1b /arch/arm/boot/dts/imx6sll.dtsi | |
| parent | 8c1a1f4879b608f6000f98d1ea3859d9a59a2b7e (diff) | |
ARM: dts: imx6sll: move GIC to right location in DT
GIC is inside of SoC from architecture perspective, it should
be located inside of soc node in DT.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6sll.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sll.dtsi | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index 97bb1e7cb0cc..365e591e7878 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi +++ b/arch/arm/boot/dts/imx6sll.dtsi @@ -75,15 +75,6 @@ }; }; - intc: interrupt-controller@a01000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x00a01000 0x1000>, - <0x00a00100 0x100>; - interrupt-parent = <&intc>; - }; - ckil: clock-ckil { compatible = "fixed-clock"; #clock-cells = <0>; @@ -134,6 +125,15 @@ reg = <0x00900000 0x20000>; }; + intc: interrupt-controller@a01000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x00a01000 0x1000>, + <0x00a00100 0x100>; + interrupt-parent = <&intc>; + }; + L2: l2-cache@a02000 { compatible = "arm,pl310-cache"; reg = <0x00a02000 0x1000>; |