diff options
| author | Zidan Wang <zidan.wang@freescale.com> | 2015-09-22 14:31:32 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:23:19 +0800 |
| commit | 5c5d8adaa310bb799e4d8d7263667b6836c72394 (patch) | |
| tree | f3e126324beb4ebd2a08fdbd4e4469374fe29568 /arch/arm/boot/dts/imx6sx-sabreauto.dts | |
| parent | a4cbed114da843894989e7db5f7cc491647f6f28 (diff) | |
MLK-11612-01 ARM: dts: imx6sx-sabreauto: add esai<->cs42888 sound card support
add esai<->cs42888 sound card support for imx6sx-sabreauto board.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sx-sabreauto.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6sx-sabreauto.dts | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts index 4f763b1b7155..ea9877da2de4 100644 --- a/arch/arm/boot/dts/imx6sx-sabreauto.dts +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts @@ -14,6 +14,14 @@ model = "Freescale i.MX6 SoloX Sabre Auto Board"; compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx"; + clocks { + codec_osc: anaclk2 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24576000>; + }; + }; + max7310_reset: max7310-reset { compatible = "gpio-reset"; reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; @@ -30,6 +38,14 @@ #address-cells = <1>; #size-cells = <0>; + reg_audio: cs42888_supply { + compatible = "regulator-fixed"; + regulator-name = "cs42888_supply"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + vcc_sd3: regulator@0 { compatible = "regulator-fixed"; reg = <0>; @@ -64,6 +80,34 @@ enable-active-high; }; }; + + sound-cs42888 { + compatible = "fsl,imx6-sabreauto-cs42888", + "fsl,imx-audio-cs42888"; + model = "imx-cs42888"; + esai-controller = <&esai>; + asrc-controller = <&asrc>; + audio-codec = <&codec>; + }; +}; + +&clks { + assigned-clocks = <&clks IMX6SX_PLL4_BYPASS_SRC>, + <&clks IMX6SX_PLL4_BYPASS>, + <&clks IMX6SX_CLK_PLL4_POST_DIV>; + assigned-clock-parents = <&clks IMX6SX_CLK_LVDS2_IN>, + <&clks IMX6SX_PLL4_BYPASS_SRC>; + assigned-clock-rates = <0>, <0>, <24576000>; +}; + +&esai { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esai_2>; + assigned-clocks = <&clks IMX6SX_CLK_ESAI_SEL>, + <&clks IMX6SX_CLK_ESAI_EXTAL>; + assigned-clock-parents = <&clks IMX6SX_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <0>, <24576000>; + status = "okay"; }; &fec1 { @@ -106,6 +150,17 @@ pinctrl-0 = <&pinctrl_i2c2_1>; status = "okay"; + codec: cs42888@048 { + compatible = "cirrus,cs42888"; + reg = <0x048>; + clocks = <&codec_osc 0>; + clock-names = "mclk"; + VA-supply = <®_audio>; + VD-supply = <®_audio>; + VLS-supply = <®_audio>; + VLC-supply = <®_audio>; + }; + max7322: gpio@68 { compatible = "maxim,max7322"; reg = <0x68>; @@ -243,6 +298,21 @@ >; }; + pinctrl_esai_2: esaigrp-2 { + fsl,pins = < + MX6SX_PAD_CSI_DATA00__ESAI_TX_CLK 0x1b030 + MX6SX_PAD_CSI_DATA01__ESAI_TX_FS 0x1b030 + MX6SX_PAD_CSI_HSYNC__ESAI_TX0 0x1b030 + MX6SX_PAD_CSI_DATA04__ESAI_TX1 0x1b030 + MX6SX_PAD_CSI_DATA06__ESAI_TX2_RX3 0x1b030 + MX6SX_PAD_CSI_DATA07__ESAI_TX3_RX2 0x1b030 + MX6SX_PAD_CSI_DATA02__ESAI_RX_CLK 0x1b030 + MX6SX_PAD_CSI_DATA03__ESAI_RX_FS 0x1b030 + MX6SX_PAD_CSI_VSYNC__ESAI_TX5_RX0 0x1b030 + MX6SX_PAD_CSI_DATA05__ESAI_TX4_RX1 0x1b030 + >; + }; + pinctrl_i2c2_1: i2c2grp-1 { fsl,pins = < MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1 |