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authorHan Xu <b45815@freescale.com>2015-11-13 10:48:22 -0600
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:23:55 +0800
commit879cf473d5917e628f52592a73caf045762edb6f (patch)
treeeeaf0be48b025e80fa84150fbf16fe0acc5e62d7 /arch/arm/boot/dts/imx6sx-sdb-reva.dts
parent6edce4b25714f92497b52882414f78fb1687761f (diff)
MLK-11939: ARM: dts: Add ddrsmp to device tree for i.mx6sx sabreauto and sdb board
Add ddrsmp parameter to device tree for i.MX6SX Sabreauto/Sabresd board. DDRSMP value: 0 ---- i.MX6SX Sabresd board (RevB and RevA) 2 ---- i.MX6SX Sabreauto board The Sabresd RevA board also needs to reduce clock to 29Mhz according to the Spansion spec. Signed-off-by: Han Xu <b45815@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sx-sdb-reva.dts')
-rw-r--r--arch/arm/boot/dts/imx6sx-sdb-reva.dts5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6sx-sdb-reva.dts b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
index 9a0640d0fed0..5a49d95d772d 100644
--- a/arch/arm/boot/dts/imx6sx-sdb-reva.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
@@ -152,13 +152,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi2>;
status = "okay";
+ ddrsmp=<0>;
flash0: s25fl128s@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
compatible = "spansion,s25fl128s", "jedec,spi-nor";
- spi-max-frequency = <66000000>;
+ spi-max-frequency = <29000000>;
};
flash1: s25fl128s@1 {
@@ -166,6 +167,6 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "spansion,s25fl128s", "jedec,spi-nor";
- spi-max-frequency = <66000000>;
+ spi-max-frequency = <29000000>;
};
};