diff options
| author | Bai Ping <b51503@freescale.com> | 2015-08-28 01:17:44 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:23:08 +0800 |
| commit | 6858c0bb5c8bf683583967495c0b0f3a57ac9e78 (patch) | |
| tree | dfd5513983591c6b330e4846ad1f11be2b876faa /arch/arm/boot/dts/imx6sx.dtsi | |
| parent | 6b39e1ba4f626e4342e9ede8f83fa50d14776d58 (diff) | |
MLK-11437-01 ARM: dts: imx: correct the clock info of cpu node
The pll1_bypass and pll1_bypass_src clock index in cpu node
should be IMX6SX_PLL1_BYPASS and IMX6SX_PLL1_BYPASS_SRC,
so correct this.
Signed-off-by: Bai Ping <b51503@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 8ab9e874b78c..a34a6e48e330 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -89,8 +89,8 @@ <&clks IMX6SX_CLK_PLL1_SW>, <&clks IMX6SX_CLK_PLL1_SYS>, <&clks IMX6SX_CLK_PLL1>, - <&clks IMX6SX_PLL7_BYPASS>, - <&clks IMX6SX_PLL7_BYPASS_SRC>; + <&clks IMX6SX_PLL1_BYPASS>, + <&clks IMX6SX_PLL1_BYPASS_SRC>; clock-names = "arm", "pll2_pfd2_396m", "step", "pll1_sw", "pll1_sys", "pll1", "pll1_bypass", "pll1_bypass_src"; |