diff options
| author | Bai Ping <b51503@freescale.com> | 2015-08-12 21:55:49 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:21:56 +0800 |
| commit | 95e005ce4017fbe8992ae3d88aca7b3a326af8af (patch) | |
| tree | 90f206426eafc37c776de84f5d39e2f6989d1609 /arch/arm/boot/dts/imx6sx.dtsi | |
| parent | f92f5a16e4ead38dd5b52244658958d0f2999ef4 (diff) | |
MLK-11343-03 ARM: dts: imx: add clocks in cpu mode
Add pll1, pll1_bypass and pll1_bypass_src clock
reference define in dts file.
Signed-off-by: Bai Ping <b51503@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 4cc0094d3203..4dd74f0c7f1c 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -87,9 +87,13 @@ <&clks IMX6SX_CLK_PLL2_PFD2>, <&clks IMX6SX_CLK_STEP>, <&clks IMX6SX_CLK_PLL1_SW>, - <&clks IMX6SX_CLK_PLL1_SYS>; + <&clks IMX6SX_CLK_PLL1_SYS>, + <&clks IMX6SX_CLK_PLL1>, + <&clks IMX6SX_PLL7_BYPASS>, + <&clks IMX6SX_PLL7_BYPASS_SRC>; clock-names = "arm", "pll2_pfd2_396m", "step", - "pll1_sw", "pll1_sys"; + "pll1_sw", "pll1_sys", "pll1", + "pll1_bypass", "pll1_bypass_src"; arm-supply = <®_arm>; soc-supply = <®_soc>; }; |