diff options
| author | Haibo Chen <haibo.chen@nxp.com> | 2019-12-18 15:49:00 +0800 |
|---|---|---|
| committer | Haibo Chen <haibo.chen@nxp.com> | 2019-12-23 14:31:27 +0800 |
| commit | 5c04e95ca6c2d012ac5f04465738ce731dff2798 (patch) | |
| tree | bbfb02015b4a06521e260f4d8f8c469069536dcc /arch/arm/boot/dts/imx6sx.dtsi | |
| parent | 7980314a3c30059610525670450897b3ee911049 (diff) | |
LF-311 ARM: dts: imx6sx: add tuning step and tuning start tap for usdhc
If usdhc want to support SDR104/HS200, it need to do tuning, so need
to config the tuning step and tuning start tap. Otherwise some card may
meet tuning issue as the following log show:
mmc2: Tuning failed, falling back to fixed sampling clock
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index ee7059250652..dca660b11e9d 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -1092,6 +1092,8 @@ <&clks IMX6SX_CLK_USDHC1>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; status = "disabled"; }; @@ -1104,6 +1106,8 @@ <&clks IMX6SX_CLK_USDHC2>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; status = "disabled"; }; @@ -1116,6 +1120,8 @@ <&clks IMX6SX_CLK_USDHC3>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; status = "disabled"; }; @@ -1128,6 +1134,8 @@ <&clks IMX6SX_CLK_USDHC4>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; status = "disabled"; }; |