diff options
| author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2015-12-16 13:16:39 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:24:02 +0800 |
| commit | 618c288a3c5e25a39c0eda37104be5f6085e8fb5 (patch) | |
| tree | b56e9830d3e9bcd628bf9d3ce333ae92258cd99d /arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts | |
| parent | 732cd9414b16719a29d845ef3bebffa7feacbbfc (diff) | |
MLK-12027: ARM: dts: fix the sample rate clock not accurate for spdif tx
Clock of spdif tx is derived from clk_ipg and clk_osc, which is not the
integer multiple size of sample rate, can't generate accurate clock for
each sample rate. Use pll4 as the clk_spdif's parent, because the clk_spdif
is the one of source clock of tx, use a proper frequency for pll4, then it
can generate more accurate clock for sample rate (32k,48k,96k,192k).
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts b/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts index d31bd3c1a2ee..1257352aca61 100644 --- a/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts +++ b/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts @@ -81,6 +81,11 @@ }; }; +&clks { + assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <786432000>; +}; + &cpu0 { /* * on i.MX6UL, no seperated VDD_ARM_IN and VDD_SOC_IN, |