diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2018-06-21 15:33:31 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:32:25 +0800 |
| commit | b844f6cdd0b6780d0312063899c7f7044635dea4 (patch) | |
| tree | 07b72d615da0607d81d28d59d7722e49bfc25e88 /arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts | |
| parent | 0b11d79be5a40483560480101491e2cef9ce56c8 (diff) | |
MLK-18652 ARM: dts: imx6: update ARM sw2iso timing setting
The sw2iso count should cover ARM LDO ramp-up time,
the MAX ARM LDO ramp-up time may be up to more than
100us, this patch sets sw2iso to 0xf (~384us) which
is the default value.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts b/arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts index 94f5d86cb748..26ae7339035d 100644 --- a/arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts +++ b/arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts @@ -182,8 +182,8 @@ }; &gpc { - fsl,cpu_pupscr_sw2iso = <0x2>; - fsl,cpu_pupscr_sw = <0x1>; + fsl,cpu_pupscr_sw2iso = <0xf>; + fsl,cpu_pupscr_sw = <0x0>; fsl,cpu_pdnscr_iso2sw = <0x1>; fsl,cpu_pdnscr_iso = <0x1>; fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */ |