diff options
| author | Fabio Estevam <fabio.estevam@nxp.com> | 2016-04-25 16:38:47 -0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2016-04-26 19:52:11 +0800 |
| commit | f70844460f03e6ad6cfb148f4c394fdda1b50363 (patch) | |
| tree | bd646c135502fd51dbe0529e8d6045b945eeb20d /arch/arm/boot/dts/imx6ul.dtsi | |
| parent | c0b20d6f4113313d8cd0566aa30f337d3697ac75 (diff) | |
ARM: dts: imx6ul: Fix operating points
Adjust the VDD_ARM_CAP and VDD_SOC_CAP voltages according to
Table-11 from MX6UL datasheet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf
(a 25mV offset is added to the minimum allowed values for safety).
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6ul.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 71778992f03d..4356b655ef02 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -55,15 +55,15 @@ clock-latency = <61036>; /* two CLK32 periods */ operating-points = < /* kHz uV */ - 528000 1250000 - 396000 1150000 - 198000 1150000 + 528000 1175000 + 396000 1025000 + 198000 950000 >; fsl,soc-operating-points = < /* KHz uV */ - 528000 1250000 - 396000 1150000 - 198000 1150000 + 528000 1175000 + 396000 1175000 + 198000 1175000 >; clocks = <&clks IMX6UL_CLK_ARM>, <&clks IMX6UL_CLK_PLL2_BUS>, |