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authorAnson Huang <b20788@freescale.com>2015-08-04 01:12:12 +0800
committerShawn Guo <shawnguo@kernel.org>2015-08-11 23:15:26 +0800
commit18619ff55d613dc5c8276ae70e5ca4e48c609f44 (patch)
tree06562e21ad90f81f7cd3902c7c035e0b2a1a054c /arch/arm/boot/dts/imx6ul.dtsi
parent461aa6d723ef7bfd0dcc44676976711e2c3445c6 (diff)
ARM: dts: imx6ul: enable GPC as extended interrupt controller
Enable GPC as extended interrupt controller of GIC, as GPC needs to manage wakeup source for low power modes. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6ul.dtsi5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 49103bc79bef..70a11e395b9d 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -126,7 +126,7 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
- interrupt-parent = <&intc>;
+ interrupt-parent = <&gpc>;
ranges;
pmu {
@@ -433,7 +433,10 @@
gpc: gpc@020dc000 {
compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
reg = <0x020dc000 0x4000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&intc>;
};
iomuxc: iomuxc@020e0000 {