diff options
| author | Bai Ping <b51503@freescale.com> | 2015-05-21 02:43:57 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-09-17 09:23:26 -0500 |
| commit | 0f038fc075548d976a324b7602b474aeebe09858 (patch) | |
| tree | 29915bd5cea3d54946bf5ae6381bb1cefe81f2d2 /arch/arm/boot/dts/imx6ul.dtsi | |
| parent | 1b518e74a182183ba051f0612dd7a2bc6352ae78 (diff) | |
MLK-10938-03 ARM: dts: imx: add busfreq node for imx6ul
Add busfreq node to enable bufreq support on i.MX6UL.
Signed-off-by: Bai Ping <b51503@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6ul.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 7a932656e2dd..70a69b0026ee 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -132,6 +132,24 @@ interrupt-parent = <&intc>; ranges; + busfreq { + compatible = "fsl,imx_busfreq"; + clocks = <&clks IMX6UL_CLK_PLL2_PFD2>, <&clks IMX6UL_CLK_PLL2_198M>, + <&clks IMX6UL_CLK_PLL2_BUS>, <&clks IMX6UL_CLK_ARM>, + <&clks IMX6UL_CLK_PLL3_USB_OTG>, <&clks IMX6UL_CLK_PERIPH>, + <&clks IMX6UL_CLK_PERIPH_PRE>, <&clks IMX6UL_CLK_PERIPH_CLK2>, + <&clks IMX6UL_CLK_PERIPH_CLK2_SEL>, <&clks IMX6UL_CLK_OSC>, + <&clks IMX6UL_CLK_AHB>, <&clks IMX6UL_CLK_AXI>, + <&clks IMX6UL_CLK_PERIPH2>, <&clks IMX6UL_CLK_PERIPH2_PRE>, + <&clks IMX6UL_CLK_PERIPH2_CLK2>, <&clks IMX6UL_CLK_PERIPH2_CLK2_SEL>, + <&clks IMX6UL_CLK_STEP>, <&clks IMX6UL_CLK_MMDC_P0_FAST>; + clock-names = "pll2_pfd2_396m", "pll2_198m", "pll2_bus", "arm", "pll3_usb_otg", + "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", + "ahb", "ocram", "periph2", "periph2_pre", "periph2_clk2", "periph2_clk2_sel", + "step", "mmdc"; + fsl,max_ddr_freq = <400000000>; + }; + pmu { compatible = "arm,cortex-a7-pmu"; interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; |