diff options
| author | Dong Aisheng <b29396@freescale.com> | 2015-05-18 21:03:16 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-09-17 09:23:03 -0500 |
| commit | 6ce9f20d2ab72b8f019a858033cf8b73e61f2779 (patch) | |
| tree | 12d72cbfa5894a16646c9b5777d67e2ca7428a54 /arch/arm/boot/dts/imx6ul.dtsi | |
| parent | 2418bc0d7cd770df124ce9aea3c86ebf7998393d (diff) | |
MLK-10922 dts: imx6ul: uSDHC should be derived from mx6sx
MX6UL uSDHC performance is bad which is caused by ADMA is not enabled.
That is because the uSDHC is set to derive from MX6SL in device tree
and MX6SL ADMA is disabled by default due to an ADMA IC bug.
Actually the mx6ul uSDHC is derived from mx6sx, so fixing it and
enable ADMA.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6ul.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 017656197954..9954266105f1 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -831,7 +831,7 @@ }; usdhc1: usdhc@02190000 { - compatible = "fsl,imx6ul-usdhc", "fsl,imx6sl-usdhc"; + compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; reg = <0x02190000 0x4000>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_USDHC1>, @@ -843,7 +843,7 @@ }; usdhc2: usdhc@02194000 { - compatible = "fsl,imx6ul-usdhc", "fsl,imx6sl-usdhc"; + compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; reg = <0x02194000 0x4000>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_USDHC2>, |