diff options
| author | Haibo Chen <haibo.chen@nxp.com> | 2016-08-09 17:51:04 +0800 |
|---|---|---|
| committer | Haibo Chen <haibo.chen@nxp.com> | 2016-08-09 17:58:16 +0800 |
| commit | 5598ab0a75c6d78de4a3ab1c0963fc2de2b7e7f1 (patch) | |
| tree | 0ec1076c462434270d3e5f6c7f4b21444b01c69f /arch/arm/boot/dts/imx6ull-14x14-evk-emmc.dts | |
| parent | 4ceda68148149d6db6dd03145cc37577667f8385 (diff) | |
MLK-13022-3 arm: dts: imx6ull-14x14-evk-emmc.dts: set usdhc2 per clock to 132MHz
For imx6ull-14x14-evk emmc rework board, usdhc2 HS200 I/O timing is
not stable @176MHz, for write operation, crc error shows up. So this
patch change the frequence to 132MHz.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ull-14x14-evk-emmc.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6ull-14x14-evk-emmc.dts | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6ull-14x14-evk-emmc.dts b/arch/arm/boot/dts/imx6ull-14x14-evk-emmc.dts index 5097ec8f6037..bf8db204017a 100644 --- a/arch/arm/boot/dts/imx6ull-14x14-evk-emmc.dts +++ b/arch/arm/boot/dts/imx6ull-14x14-evk-emmc.dts @@ -14,8 +14,9 @@ pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>; pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>; assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>; - assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD0>; - assigned-clock-rates = <0>, <176000000>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; + assigned-clock-rates = <0>, <396000000>; + max-frequency = <132000000>; bus-width = <8>; non-removable; status = "okay"; |