diff options
| author | Fugang Duan <b38611@freescale.com> | 2015-09-01 10:31:35 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 11:00:10 -0600 |
| commit | e05b525b8a9b314006596e5da000f274712f5e5c (patch) | |
| tree | 8d409b4d974006ba4b36c75c683e554a923d8d61 /arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts | |
| parent | e4732c0e9e04ff911fff088cbaf558cd9562067c (diff) | |
MLK-11456-02 ARM: dts: imx7d-12x12-lpddr3-arm2: enable uart3 for bt in lpsr mode
Enable uart3 for bt in lpsr mode.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts index 6245ada1536c..e65e9c72284a 100644 --- a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts +++ b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts @@ -303,6 +303,12 @@ imx7d-12x12-lpddr3-arm2 { + pinctrl_bt: btgrp-1 { + fsl,pins = < + MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x80000000 /* BT REG on */ + >; + }; + pinctrl_ecspi1_cs_1: ecspi1_cs_grp-1 { fsl,pins = < MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x2 @@ -361,7 +367,6 @@ MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x80000000 MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x80000000 MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x80000000 - MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x80000000 /* BT REG on */ MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x17059 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x17059 MX7D_PAD_SD1_WP__GPIO5_IO1 0x17059 @@ -634,16 +639,20 @@ }; &uart1 { - pinctrl-names = "default"; + pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_uart1_1>; + pinctrl-1 = <&pinctrl_uart1_1>; assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; status = "okay"; }; &uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3_1>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_uart3_1 + &pinctrl_bt>; + pinctrl-1 = <&pinctrl_uart3_1 + &pinctrl_bt>; fsl,uart-has-rtscts; assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; |