diff options
| author | Fugang Duan <b38611@freescale.com> | 2015-08-18 09:53:45 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:21:55 +0800 |
| commit | 30ddda20a4eabc20f10f468a61859356682a6ee3 (patch) | |
| tree | ea1e67397025a07f617d97a025ec806697f2f5dd /arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts | |
| parent | 4f24ab7d30d8dbb5eb6bb895fa25ed71c6f508fc (diff) | |
MLK-10806 ARM: dts: imx7d-12x12-lpddr3-arm2: add BT pin config
Add uart3 node and BT reg on pin config.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: 76a0d0595a15346ec954c14e0d4f777d218c0b15)
Diffstat (limited to 'arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts index 3da0277e389e..dc2f9036d9f4 100644 --- a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts +++ b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts @@ -318,6 +318,7 @@ MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x80000000 MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x80000000 MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x80000000 + MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x80000000 /* BT REG on */ MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x17059 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x17059 MX7D_PAD_SD1_WP__GPIO5_IO1 0x17059 @@ -407,6 +408,24 @@ >; }; + pinctrl_uart3_1: uart3grp-1 { + fsl,pins = < + MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x79 + MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x79 + MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x79 + MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x79 + >; + }; + + pinctrl_uart3dte_1: uart3dtegrp-1 { + fsl,pins = < + MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 + MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 + MX7D_PAD_UART3_RTS_B__UART3_DTE_CTS 0x79 + MX7D_PAD_UART3_CTS_B__UART3_DTE_RTS 0x79 + >; + }; + pinctrl_usbotg1_vbus: usbotg1vbusgrp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x14 @@ -537,6 +556,18 @@ status = "okay"; }; +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3_1>; + fsl,uart-has-rtscts; + assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + status = "disabled"; + /* for DTE mode, add below change */ + /* fsl,dte-mode;*/ + /* pinctrl-0 = <&pinctrl_uart3dte_1>; */ +}; + &usbotg1 { vbus-supply = <®_usb_otg1_vbus>; srp-disable; |