diff options
| author | Li Jun <jun.li@freescale.com> | 2015-08-07 22:20:25 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:21:38 +0800 |
| commit | f7f52ab263587222277e7fc6a23f084a220fbb04 (patch) | |
| tree | f47c7bab57d46038ba00179ddef848b4ba0363f2 /arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts | |
| parent | 139d69437de01b5d8a55f5892db64c5a33552e76 (diff) | |
MLK-10282-3 ARM: imx7d-12x12-arm2: enable usbotg1 and usbotg2
Enable usbotg1 and usbotg2
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Fixed pinctrl during 4.14 rebase for upstream LPSR rename.
Also it should be _GPIO1_IO05__GPIO1_IO5 not _GPIO1_IO05__GPIO5_IO5.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts index 6038d57cb4fd..f2c0c6166f9b 100644 --- a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts +++ b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts @@ -24,6 +24,8 @@ regulators { compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; reg_sd1_vmmc: sd1_vmmc{ compatible = "regulator-fixed"; @@ -42,6 +44,26 @@ gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + reg_usb_otg1_vbus: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "usb_otg1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usb_otg2_vbus: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "usb_otg2_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; memory { @@ -344,6 +366,18 @@ >; }; + pinctrl_usbotg1_vbus: usbotg1vbusgrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x14 + >; + }; + + pinctrl_usbotg2_vbus: usbotg2vbusgrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 + >; + }; + pinctrl_usdhc1_1: usdhc1grp-1 { fsl,pins = < MX7D_PAD_SD1_CMD__SD1_CMD 0x17059 @@ -449,6 +483,16 @@ status = "okay"; }; +&usbotg1 { + vbus-supply = <®_usb_otg1_vbus>; + status = "okay"; +}; + +&usbotg2 { + vbus-supply = <®_usb_otg2_vbus>; + status = "okay"; +}; + &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1_1>; |