diff options
author | Stefan Agner <stefan.agner@toradex.com> | 2016-05-23 17:58:46 -0700 |
---|---|---|
committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-01-10 23:09:48 +0100 |
commit | 8693a14665f5b0df331678e3b584a651e147865b (patch) | |
tree | 7e5bfca30d473f58a33d5adfd50ec09a47edbf5a /arch/arm/boot/dts/imx7d-pinfunc-lpsr.h | |
parent | ea2ea01eceb839153c1887fb01e0c602530d6a3e (diff) |
pinctrl: pinctrl-imx: add support for LPSR GPR padctrl
The LPSR IOMUXC also has a general purpose (GPR) part which is able
to define pad settings for GPIO8-15. Implement it as yet another
pinctrl driver.
Note: 4 GPIO's share one register, the values are currently over-
written, hence the current code only allows one GPIO per register
to be configured...
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
(cherry picked from commit 053c208cac8778fee589ef4f6b3a4ebe0d7a44d2)
Diffstat (limited to 'arch/arm/boot/dts/imx7d-pinfunc-lpsr.h')
-rw-r--r-- | arch/arm/boot/dts/imx7d-pinfunc-lpsr.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7d-pinfunc-lpsr.h b/arch/arm/boot/dts/imx7d-pinfunc-lpsr.h index 378694ee05c2..aee2da9add91 100644 --- a/arch/arm/boot/dts/imx7d-pinfunc-lpsr.h +++ b/arch/arm/boot/dts/imx7d-pinfunc-lpsr.h @@ -73,4 +73,16 @@ #define MX7D_PAD_GPIO1_IO07__CCM_STOP 0x001C 0x004C 0x0000 0x5 0x0 #define MX7D_PAD_GPIO1_IO07__KPP_COL4 0x001C 0x004C 0x0604 0x6 0x1 +/* + * Pad configuration for LPSR GPR (GPIO8-15) + */ +#define MX7D_PAD_GPIO1_IO08_GPR__GPIO1_IO8 0x0000 0x0050 0x0000 0x0 0x0 +#define MX7D_PAD_GPIO1_IO09_GPR__GPIO1_IO9 0x0000 0x0050 0x0000 0x0 0x0 +#define MX7D_PAD_GPIO1_IO10_GPR__GPIO1_I10 0x0000 0x0050 0x0000 0x0 0x0 +#define MX7D_PAD_GPIO1_IO11_GPR__GPIO1_I11 0x0000 0x0050 0x0000 0x0 0x0 +#define MX7D_PAD_GPIO1_IO12_GPR__GPIO1_I12 0x0000 0x0054 0x0000 0x0 0x0 +#define MX7D_PAD_GPIO1_IO13_GPR__GPIO1_I13 0x0000 0x0054 0x0000 0x0 0x0 +#define MX7D_PAD_GPIO1_IO14_GPR__GPIO1_I14 0x0000 0x0054 0x0000 0x0 0x0 +#define MX7D_PAD_GPIO1_IO15_GPR__GPIO1_I15 0x0000 0x0054 0x0000 0x0 0x0 + #endif /* __DTS_IMX7D_PINFUNC_LPSR_H */ |