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authorAnson Huang <Anson.Huang@nxp.com>2016-11-21 20:55:37 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:25:16 +0800
commitdf0754208abdb10f276d79456fbf9788646b6d36 (patch)
treebafaf3df3ecdc367014f3f67cbf7b93e23fa9d0b /arch/arm/boot/dts/imx7ulp-evk.dts
parentf07860d41c49cebca08f0fa95a9924f31a318043 (diff)
MLK-13487-1 ARM: dts: imx7ulp: add PTC1 pin as GPIO
Add PTC1 pin as GPIO on i.MX7ULP SOM board, it is to control NVCC_DRAM_SW during suspend/resume. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7ulp-evk.dts')
-rw-r--r--arch/arm/boot/dts/imx7ulp-evk.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts b/arch/arm/boot/dts/imx7ulp-evk.dts
index badbb299c3fb..74ca200da381 100644
--- a/arch/arm/boot/dts/imx7ulp-evk.dts
+++ b/arch/arm/boot/dts/imx7ulp-evk.dts
@@ -33,6 +33,7 @@
pinctrl_hog_1: hoggrp-1 {
fsl,pins = <
IMX7ULP_PAD_PTC10__PTC10 0x30100
+ IMX7ULP_PAD_PTC1__PTC1 0x20100
>;
};