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| author | Bai Ping <ping.bai@nxp.com> | 2016-11-28 11:09:29 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:25:17 +0800 |
| commit | 3ecf135221ce7a009666ae36e2aff9042c4787e4 (patch) | |
| tree | 0602abf5767cc0e335483d2d86d79ce57d25665d /arch/arm/boot/dts/imx7ulp.dtsi | |
| parent | 720817af04682ccc31dbe30b40cbbbbb597f73c9 (diff) | |
MLK-13520-01 ARM: dts: Add 'timeout-sec' property for wdog node
Add 'timeout-sec' property for wdog node of i.MX7ULP.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7ulp.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx7ulp.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index 056363ca4112..640f69de56e7 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -307,6 +307,12 @@ clocks = <&clks IMX7ULP_CLK_WDG1>; assigned-clocks = <&clks IMX7ULP_CLK_WDG1>; assigned-clocks-parents = <&clks IMX7ULP_CLK_FIRC>; + /* + * As the 1KHz LPO clock rate is not trimed,the actually clock + * is about 667Hz, so the init timeout 60s should set 40*1000 + * in the TOVAL register. + */ + timeout-sec = <40>; }; wdog2: wdog@40430000 { @@ -316,6 +322,7 @@ clocks = <&clks IMX7ULP_CLK_WDG2>; assigned-clocks = <&clks IMX7ULP_CLK_WDG2>; assigned-clocks-parents = <&clks IMX7ULP_CLK_FIRC>; + timeout-sec = <40>; }; clks: scg1@403E0000 { |