diff options
| author | Dong Aisheng <aisheng.dong@nxp.com> | 2017-09-06 22:25:22 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:30:31 +0800 |
| commit | b6c414407ec94668d96ebef211f422fdd83b0e48 (patch) | |
| tree | 2453d2ba6c38f2c219fe7967406d1e2a9b806fd6 /arch/arm/boot/dts/imx7ulp.dtsi | |
| parent | 81a424f4a2649332fece51983fd6f3c4014d75f0 (diff) | |
MLK-17491-15 dts: imx7ulp: add necessary clock for gpio node
On MX7ULP, GPIO controller needs two necessary clocks:
Port module clock and GPIO module clock.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7ulp.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx7ulp.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index 38f57c9fa6da..32822046501d 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -530,6 +530,9 @@ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&clks IMX7ULP_CLK_RGPIO2P1>, + <&clks IMX7ULP_CLK_PCTLC>; + clock-names = "port", "gpio"; gpio-ranges = <&iomuxc1 0 0 32>; }; @@ -541,6 +544,9 @@ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&clks IMX7ULP_CLK_RGPIO2P1>, + <&clks IMX7ULP_CLK_PCTLD>; + clock-names = "port", "gpio"; gpio-ranges = <&iomuxc1 0 32 32>; }; @@ -552,6 +558,9 @@ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&clks IMX7ULP_CLK_RGPIO2P1>, + <&clks IMX7ULP_CLK_PCTLE>; + clock-names = "port", "gpio"; gpio-ranges = <&iomuxc1 0 64 32>; }; @@ -563,6 +572,9 @@ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&clks IMX7ULP_CLK_RGPIO2P1>, + <&clks IMX7ULP_CLK_PCTLF>; + clock-names = "port", "gpio"; gpio-ranges = <&iomuxc1 0 96 32>; }; |